S.S.Deswal received his B.Tech degree in Electrical Engineering from R.E.C, Kurukshetra , Kurukshetra University ,Haryana, India in 1998, the M.E degree in Electrical Engineering(Power Apparatus and Systems) from Delhi College of Engineering, Delhi University, Delhi, India in 2005, and Doctor of Philosophy ( in Electrical Engineering from N.I.T, Kurukshetra, Haryana a Deemed University, Haryana, Delhi in February 2012 on the research Topic “Ride Through Capabilities for Adjustable Speed Drives(ASD’s)”.
Currently, he is holding an additional charge of Dean (Academics) along with Associate Professor in EEE Department with the Maharaja Agrasen Institute of technology, Rohini, Delhi under GGSIP University. He has joined Maharaja Agrasen Institute of technology on October 6, 2006 as a Senior Lecturer.
Before joining MAIT in 2006, he was with C.R.Institute of Technology, Kanjhawala, Delhi and was working as Head of the Electrical and Instrumentation Control Department, from 1998 to 2006
EDUCATION
Ph.D in Electrical Engineering (NIT, KKR)
M.TECH (PAS) (DELHI COLLEGE OF ENGINEERING
B.TECH IN ELECTRICAL ENGINEERING (REC, KKR)
RESEARCH, TEACHING, or OTHER INTERESTS
Electrical and Electronic Engineering, Renewable Energy, Sustainability and the Environment
Temperature-Dependent Highly Sensitive Stack-Engineered Junctionless-Accumulation- Surrounding Gate FET (SE-JAM-SG FET) for the PH3 Gas Detector Neeraj, Shobha Sharma, Anubha Goel, Sonam Rewari, S. S. Deswal, R. S. Gupta IETE Journal of Research, 2026 This study proposes an analytical model for examining the way temperature affects Stack-Engineered Junctionless-Accumulation-Surrounding-Gate FET (SE-JAM-SG FET). Surface potential, electric field, drain current (Ids), transconductance (gm), and output conductance (gd) have all been derived using the 2-D Poisson's equation, along with necessary boundary conditions. The study has been done for various catalytic metal gates, namely, Platinum (Pt), Rhodium (Rh), Palladium (Pd), and Iridium (Ir), for sensing phosphine gas (PH3). On-state current (IOn), subthreshold leakage current (IOff), and On-state current-to-Off-state current ratio (IOn/IOff) are being analyzed to quantify the sensitivity for temperature ranges (100 K, 200 K, 300 K, and 400 K). For a fair comparison, the temperature variation impact has also been examined for potential and electron concentration by contour plots, as well as an in-depth investigation of CBE (conduction band energy) and VBE (valence band energy) that has been carried out. Furthermore, the effects of gate stacking, GS = SiO2 + high-k dielectric, on the sensitivity-based parameters have also been investigated and discussed. The numerical simulation's results and those of the generated analytical model have been compared and contrasted to validate our results using the ATLAS 3-D device simulator.
Numerical simulation-based biosensing performance exploration of a cylindrical BioFET using machine learning Amit Das, Sonam Rewari, Binod Kumar Kanaujia, S. S. Deswal, R. S. Gupta Machine Learning for Semiconductor Materials, 2025 This chapter presents an innovative numerical simulation–based exploration into controlling and fine-tuning the threshold voltage and subthreshold slope sensitivity of a cylindrical BioFET, explicitly tailored for label-free biosensing applications. Embracing a comprehensive analysis, the investigation focuses on the intricate relationship between sensitivity and doping levels. Sensitivity assessment relies on detecting variations in device metrics. Remarkably, the findings unveil that biosensors featuring symmetric doping demonstrate superior percentage sensitivity (in terms of sensing parameter variation) towards biomolecules when compared with their asymmetrically doped counterparts. To ensure robustness and depth in analysis, an array of different test biomolecules and diverse sensing metrics have been meticulously considered. Through exhaustive numeric simulations, the influence of temperature and fill-in factor on sensitivity is discussed, illuminating a comprehensive understanding of biosensing phenomena. The substantial percentage change resulting from doping variation underscores the enhanced biosensing capabilities in terms of threshold voltage and subthreshold slope alterations. While the main emphasis of this work is on the sensitivity variations modulated by doping, a concise synoptic overview of the application of machine learning in predicting biosensing metrics and the performance of the proposed BioFET is also included. The incorporation of ML techniques can notably expedite the design optimization process, uncovering profound insights that are challenging to achieve through traditional methods.
Coordinated VSG-SMES Control for Enhanced Frequency Stability in Hybrid Power Systems Vansh Suri, Ravi Sharma, Neelu Nagpal, Neelam Kassarwani, S. S. Deswal, Somesubhra Panda 3rd International Conference on Power Electronics and Energy Icpee 2025, 2025 The integration of renewable energy sources (RES) into power grids presents challenges due to the lack of natural inertia in inverter-based systems. Virtual Synchronous Generators (VSGs) emulate the inertial response of conventional generators, but their performance is limited during rapid load changes. To enhance stability, Superconducting Magnetic Energy Storage (SMES) is integrated for fast frequency support. This paper introduces a coordinated VSG-SMES control strategy optimized using the Fast Seahorse Optimization Algorithm (FSOA), a bio-inspired metaheuristic. The proposed control strategy, validated through time-domain simulations, achieves a 2.5% reduction in frequency RMSE, a 4.8% decrease in maximum frequency deviation, and a 4.5% improvement in settlement time compared to conventional systems. The analysis confirms that the proposed FSOA-based coordinated control significantly enhances grid stability. This establishes it as a promising solution for modern hybrid power systems, particularly those with a high penetration of renewable energy.
Impact of Interface Trap Charges on Silicon Carbide (4H-SiC) Based Gate - Stack, Dual Metal, Surrounding Gate, FET (4H-SiC- GSDM-SGFET) for Analog and Noise Performance Analysis for 5 G/LTE Applications Neeraj, Shobha Sharma, Anubha Goel, Sonam Rewari, S. S. Deswal, R. S. Gupta Ecs Journal of Solid State Science and Technology, 2024 This article examines the impact of various interface trap charges on silicon carbide-based gate—stack, dual metal, surrounding gate, FET (4H-SiC-GSDM-SGFET). It has been contrasted for performance with silicon carbide (4H-SiC)-based dual metal, surrounding gate, FET (4H-SiC-DM- SGFET). For both devices, output characteristics including transconductance (gm), output conductance (gd), drain current (Ids), gate capacitance (Cgg), cutoff frequency (fT) and threshold voltage (Vth) have been examined. Surface potential and electron concentration were also inspected using a contour plot for both the device structures. A gate-stack with a high k- dielectric, Lanthanum oxide (La2O3) along with gate dielectric layer Aluminum oxide (Al2O3) was used for proposed structure implementation. Additionally, we investigated how trap charges affect noise figure (NF) and noise conductance (NC). Also, a CMOS inverter has been developed and its output characteristics have been compared for both the device architectures. ATLAS 3-D device simulator has been employed to conduct the simulations.
Design of Low Power Analog/RF Signal Processing Circuits Using 22 nm Silicon-on-Insulator Schottky Barrier Nano-Wire MOSFET Jitender Kumar, Aparna N. Mahajan, S. S. Deswal, Amit Saxena, R. S. Gupta International Journal of High Speed Electronics and Systems, 2024 The gate-all-around (GAA) silicon-on-insulator (SOI) Schottky barrier (SB) nano-wire (NW) MOSFET was recently proposed for low-power and high-frequency analog and radio frequency (RF) circuits. But their use in low-power and high-frequency analog/RF circuits is still under investigation. In this work, basic analog signal processing circuits using gate-all-around SOI-SB-NW MOSFETs are designed for low-power and high-frequency applications. These basic and necessary analog processing circuits are designed for ± 0.3 V and ± 0.25 V power supplies to work on frequencies up to 10 GHz. The analog/RF characteristics of the GAA SOI-SB MOSFET are compared with those of the GAA SB NW MOSFET. The SOI-SB NW MOSFET shows improvements in early voltage, output resistance, and transconductance generation factor. The Silvaco TCAD simulator is used to obtain the results and perform numerical simulations. Simulation results show good analog/RF performance of the analog processing circuits.
Coordinated VSG-SMES Control for Enhanced Frequency Stability in Hybrid Power Systems V Suri, R Sharma, N Nagpal, N Kassarwani, SS Deswal, S Panda 2025 International Conference on Power Electronics and Energy (ICPEE), 1-6 , 2025 2025
Temperature-Dependent Highly Sensitive Stack-Engineered Junctionless-Accumulation- Surrounding Gate FET (SE-JAM-SG FET) for the PH 3 Gas Detector Neeraj, S Sharma, A Goel, S Rewari, SS Deswal, RS Gupta IETE Journal of Research, 1-18 , 2025 2025
Temperature-induced performance variation in GaN cylindrical Schottky Barrier MOSFETs: A comprehensive study S Sharma, P Goyal, A Das, M Athwal, N Yadav, S Manasoori, Lucky, ... AIP Conference Proceedings 3362 (1), 030002 , 2025 2025 Citations: 2
Analytical characterization of a label free Si/InAs hetero-interfaced cylindrical BioFETD for biosensing applications A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Micro and Nanostructures 204, 208152 , 2025 2025 Citations: 34
Analytical modeling of cylindrical Silicon-on-Insulator Schottky Barrier MOSFET and impact of insulator pillar radius on analog/RF and linearity parameters for low power … J Kumar, A Saxena, SS Deswal, AN Mahajan, RS Gupta Microelectronics Journal 156, 106505 , 2025 2025 Citations: 1
Numerical simulation-based biosensing performance exploration of a cylindrical BioFET using machine learning A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Machine Learning for Semiconductor Materials, 109-141 , 2025 2025 Citations: 4
Temprature Dependance on Various Electrical Characterstics for Silicon Carbide (4H-SiC) Based Gate—Stack (GS) Dual Metal (DM) Nanowire (NW) FET S Sharma, A Goel, S Rewari, SS Deswal, RS Gupta 2024 IEEE 21st India Council International Conference (INDICON), 1-7 , 2024 2024
Analog and high frequency analysis of dielectric pocket engineered (DPE) 4H-SiC based dual metal (DM), gate-stack (GS), surrounding gate, FET (DPE-4H-SiC-GSDM-SGFET) for GIDL … S Sharma, A Goel, S Rewari, SS Deswal, RS Gupta 2024 IEEE International Conference of Electron Devices Society Kolkata … , 2024 2024 Citations: 1
Impact of interface trap charges on silicon carbide (4H-SiC) based gate–stack, dual metal, surrounding gate, FET (4H-SiC-GSDM-SGFET) for analog and noise performance analysis … Neeraj, S Sharma, A Goel, S Rewari, SS Deswal, RS Gupta ECS Journal of Solid State Science and Technology 13 (7), 073015 , 2024 2024 Citations: 6
RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 30 (6), 673-685 , 2024 2024 Citations: 5
Initial Design Procedure for Electric Two-Wheeler Retrofitting Using Internal Combustion Drive Cycles Lakshay, V Agarwal, N Nagpal, SS Deswal International Conference on Renewable Power, 321-343 , 2024 2024
Design of low power analog/RF signal processing circuits using 22 nm silicon-on-insulator Schottky barrier nano-wire MOSFET J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta International Journal of High Speed Electronics and Systems 33 (01), 2450003 , 2024 2024 Citations: 5
Modeling and Simulation Characteristics of a Highly-Sensitive Stack-Engineered Junctionless Accumulation Nanowire FET for PH 3 Gas Detector Neeraj, S Sharma, A Goel, R Sonam, SS Deswal, RS Gupta ECS Journal of Solid State Science and Technology 13 (2), 027007 , 2024 2024 Citations: 13
Analytical analysis and linearity performance of dual metal high‐K Schottky nanowire FET (DM‐HK‐SNWFET) S Sharma, V Nath, SS Deswal, RS Gupta International Journal of Numerical Modelling: Electronic Networks, Devices … , 2024 2024 Citations: 1
Physics based numerical model of a nanoscale dielectric modulated step graded germanium source biotube FET sensor: modelling and simulation A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Physica Scripta 98 (11), 115013 , 2023 2023 Citations: 65
Analytical investigation of a triple surrounding gate germanium source metal–oxide–semiconductor field‐effect transistor with step graded channel for biosensing applications A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta International Journal of Numerical Modelling: Electronic Networks, Devices … , 2023 2023 Citations: 58
Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 29 (10), 1431-1442 , 2023 2023 Citations: 2
Ge/Si interfaced label free nanowire BIOFET for biomolecules detection-analytical analysis A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Microelectronics Journal 138, 105832 , 2023 2023 Citations: 65
Analytical modeling and doping optimization for enhanced analog performance in a Ge/Si interfaced nanowire MOSFET A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Physica Scripta 98 (7), 074005 , 2023 2023 Citations: 61
Analytical modelling, simulation, and characterization of temperature-dependent GaN-HK-SBNWFET for high-frequency application S Sharma, V Nath, SS Deswal, RS Gupta Microelectronics Journal 137, 105797 , 2023 2023 Citations: 6
MOST CITED SCHOLAR PUBLICATIONS
Numerical modeling of a dielectric modulated surrounding-triple-gate germanium-source MOSFET (DM-STGGS-MOSFET)-based biosensor A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Journal of Computational Electronics 22 (2), 742-759 , 2023 2023 Citations: 76
Dielectric modulated junctionless biotube FET (DM-JL-BT-FET) bio-sensor A Goel, S Rewari, S Verma, SS Deswal, RS Gupta IEEE Sensors Journal 21 (15), 16731-16743 , 2021 2021 Citations: 74
A New Approach for the Security of VPN KKVV Singh, H Gupta Proceedings of the Second International Conference on Information and … , 2016 2016 Citations: 69
Numerical modeling of Subthreshold region of junctionless double surrounding gate MOSFET (JLDSG) SRSHVNSSDRS Gupta Superlattices and Microstructures 90, 8-19 , 2015 2015 Citations: 69
Physics based numerical model of a nanoscale dielectric modulated step graded germanium source biotube FET sensor: modelling and simulation A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Physica Scripta 98 (11), 115013 , 2023 2023 Citations: 65
Ge/Si interfaced label free nanowire BIOFET for biomolecules detection-analytical analysis A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Microelectronics Journal 138, 105832 , 2023 2023 Citations: 65
Analytical modeling and doping optimization for enhanced analog performance in a Ge/Si interfaced nanowire MOSFET A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Physica Scripta 98 (7), 074005 , 2023 2023 Citations: 61
Analytical investigation of a triple surrounding gate germanium source metal–oxide–semiconductor field‐effect transistor with step graded channel for biosensing applications A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta International Journal of Numerical Modelling: Electronic Networks, Devices … , 2023 2023 Citations: 58
Gate-induced drain leakage reduction in cylindrical dual-metal hetero-dielectric gate all around MOSFET S Rewari, V Nath, S Haldar, SS Deswal, RS Gupta IEEE Transactions on Electron Devices 65 (1), 3-10 , 2017 2017 Citations: 55
Analytical modeling of Junctionless Accumulation Mode Cylindrical Surrounding Gate MOSFET (JAM‐CSG) N Trivedi, M Kumar, S Haldar, SS Deswal, M Gupta, RS Gupta International Journal of Numerical Modelling: Electronic Networks, Devices … , 2016 2016 Citations: 51
Improved analog and AC performance with increased noise immunity using nanotube junctionless field effect transistor (NJLFET) S Rewari, V Nath, S Haldar, SS Deswal, RS Gupta Applied Physics A 122 (12), 1049 , 2016 2016 Citations: 49
Doping induced threshold voltage and I ON /I OFF ratio modulation in surrounding gate MOSFET for analog applications A Das, BK Kanaujia, SS Deswal, S Rewari, RS Gupta 2022 IEEE international conference of electron devices society kolkata … , 2022 2022 Citations: 44
Hafnium oxide based cylindrical junctionless double surrounding gate (CJLDSG) MOSFET for high speed, high frequency digital and analog applications S Rewari, V Nath, S Haldar, SS Deswal, RS Gupta Microsystem Technologies 25 (5), 1527-1536 , 2019 2019 Citations: 44
Novel design to improve band to band tunneling and gate induced drain leakages (GIDL) in cylindrical gate all around (GAA) MOSFET S Rewari, V Nath, S Haldar, SS Deswal, RS Gupta Microsystem Technologies 25 (5), 1537-1546 , 2019 2019 Citations: 39
Analytical characterization of a label free Si/InAs hetero-interfaced cylindrical BioFETD for biosensing applications A Das, S Rewari, BK Kanaujia, SS Deswal, RS Gupta Micro and Nanostructures 204, 208152 , 2025 2025 Citations: 34
Analytical modelling and sensitivity analysis of Gallium Nitride-Gate Material and, dielectric engineered-Schottky nano-wire fet (GaN-GME-DE-SNW-fet) based label-free biosensor S Sharma, V Nath, SS Deswal, RS Gupta Microelectronics Journal 129, 105599 , 2022 2022 Citations: 33
Charge plasma technique based dopingless accumulation mode junctionless cylindrical surrounding gate MOSFET: analog performance improvement N Trivedi, M Kumar, S Haldar, SS Deswal, M Gupta, RS Gupta Applied Physics A 123 (9), 564 , 2017 2017 Citations: 30
Sensitivity investigation of gate-all-around junctionless transistor for hydrogen gas detection Y Pratap, M Kumar, M Gupta, S Haldar, RS Gupta, SS Deswal 2016 IEEE International Nanoelectronics Conference (INEC), 1-2 , 2016 2016 Citations: 22
Analytical modeling simulation and characterization of short channel Junctionless Accumulation Mode Surrounding Gate (JLAMSG) MOSFET for improved analog/RF performance N Trivedi, M Kumar, S Haldar, SS Deswal, M Gupta, RS Gupta Superlattices and Microstructures 100, 1263-1275 , 2016 2016 Citations: 21
Application of boost converter for ride-through capability of adjustable speed drives during sag and swell conditions SS Deswal, R Dahiya, DK Jain World Academy of Science, Engineering and Technology 47, 282-286 , 2008 2008 Citations: 18