Saeid Seyedi

Scopus Publications

A scalable architecture for quantum information processors: qubit partitioning, placement, and scheduling for minimized circuit latency
Zahra Alimohammadi, Naser Mohammadzadeh, Saeid Seyedi, Hatam Abdoli
EPJ Quantum Technology, 2026
Quantum-dot cellular automata-based approximate CSA and RBS with ultra-low cells
Saeid Seyedi, Hatam Abdoli
Journal of Computational Electronics, 2026
A compact and efficient QCA-based nano-scale circuit for morphological operations in image processing
Saeid Seyedi, Hatam Abdoli, Mahnoush Sefidabian
Cluster Computing, 2026
A Novel Nano-Scale Shift Register Architecture with Rest Function Based on Quantum Dots
Li Fu, Saeid Seyedi
IETE Journal of Research, 2026
Quantum-dot cellular automata (QCA) give CMOS technology many advantages, including very low power consumption, increased clock speed, inherent noise immunity, and high scalability. As CMOS technology is becoming obsolete due to its lower power efficiency, decreased speeds, susceptibility to noise interference, and lower scalability, QCA nanotechnology is an appropriate substitute. Shift registers are used in QCA's digital circuit and memory cell design. This work proposes new designs for shift registers in nanotechnology in QCA using a D-latch gate configuration distributed across three layers. The multi-layer structure is high-speed with a comparably low cell count, which is low in comparison with conventional designs. In addition, the circuit also provides direct access to outputs and inputs, an element that was greatly overlooked in earlier designs. Another highlight feature of this circuit is a reset pin for shift registers utilized by microprocessors. Something that even the majority of previous designs lacked, this paper proposes a new design for a shift register circuit featuring a reorganize pin. This design is also new in terms of stability, cell count, and area consumed compared with other designs not designed with reset capability. Design performance analysis was done through simulation with the software tool QCADesigner 2.0.3, which demonstrated good characteristics in the dimensions of size and complexity.
Design and assessment of even parity generator and checker circuits for nanoscale communication networks using quantum dots
Saeid Seyedi, Hatam Abdoli
Scientific Reports, 2025
Quantum-dot Cellular Automata (QCA) is a new nanoscale computing architecture that has ultra-low power, high device density, and possible applicability to future nano-communication systems. In this paper, we present optimized QCA-based even parity generator and parity checker circuits with efficient XOR logic. The proposed designs reduce area and cell count significantly while maintaining stable logical operation. The circuits were drawn and simulated in QCADesigner-E and analyzed using QCAPro for energy dissipation and polarization error. Results show that the proposed parity generator reduces 57% cell count and 20% area over existing designs, whereas the parity checker reduces 67% cell count and 12.5% area. These improvements indicate the potential of the proposed circuits for low-power and small-area error detection mechanisms in nanoscale communication systems.
A fault tolerant CSA in QCA technology for IoT devices
Saeid Seyedi, Hatam Abdoli
Scientific Reports, 2025
According to recent research, with the ever-increasing use of Internet of Things (IoT) devices, there has arisen an ever-growing need for high-performance yet low-power circuits that can efficiently process information. Quantum-dot Cellular Automata (QCA) has emerged as a promising alternative to conventional complementary metal-oxide-semiconductor (CMOS) technology due to its great potential in digital design at nanoscale levels on account of very low power consumption and very high processing speed. However, QCA circuits are inherently prone to faults due to variations in manufacturing processes and due to the influence of environmental factors. These faults degrade the performance of a QCA circuit considerably. Hence, fault tolerance is one of the major factors of consideration while designing a QCA circuit, particularly when the application requires very reliable and continuous operation, say in an IoT system. As such, this work presents a fault tolerant Carry Skip Adder (CSA) for QCA-based circuits. The fault tolerance of basic arithmetic components of IoT nodes performing tasks corresponding to the signal processing, control, and data manipulations is enhanced in the proposed architecture. The area occupied by a fault-tolerant full-adder circuit is 0.06 μm² and a clock cycle is 0.75; its core will be used in the CSA design. It realizes fault-tolerant multiplexers (MUX) and a majority gate, which gives the same result when there is a missing or extra single-cell fault. The most astonishing characteristic of this transistor-based CSA is its 85% tolerance for different types of failures. The CSA with three layers contains 1542 quantum cells, 4.75 clock phases, and occupies an area of 4.59 μm². It is compact and efficient architecture; therefore, it is very suitable for IoT applications where the area constraint and power efficiency are the key issues. The proposed CSA will increase the robustness and reliability of QCA-based digital circuits by integrating fault tolerance into its design such that the circuitry based on QCA can keep their functionality on even in fault-prone environments.
A new design of an efficient configurable circuit based on quantum-dot technology for digital image processing
Ligang Tang, Tong Kong, Saied Seyedi
Analog Integrated Circuits and Signal Processing, 2025
Approximate Full-Adder, Full-subtractor, and Full-Adder/Subtractor circuits based on QCA
Saeid Seyedi, Hatam Abdoli
2025 29th International Computer Conference Computer Society of Iran Csicc 2025, 2025
QCA has garnered a lot of attention lately because to its promise for low latency, compact space, low complexity, and low power consumption. At the same time, a new nanotechnology paradigm called approximation computing simplifies computation high-performance design method, and becomes a low-power for calculation circuits. Additionally, a lot of digital circuit design has made use of the XOR gate. A crucial part of QCA technology, the full-adder (FA) circuit is used for arithmetic logic unit operations such as subtraction, multiplication, and division. The design of approximation FA, full-subtractor (FS), and full-adder/subtractor (F$A$/S) has been extensively studied. The approximate F$A$/S designs demonstrated just 10 cells utilized in implementation, an area of 0.01μm2, and a delay of 0.5 clock phases. Specifically, the approximate FA and FS designs achieved an area of 0.01 μm2 and a latency of 0.5 clock phases. By using the QCADesigner tool for functional verification, the efficacy of these designs was confirmed. Three new and innovative QCA-based circuits-FA/S, FS, and FA approximations-are presented in this work. Accessing the components without being surrounded by other cells is made easy by the fact that each design has outputs on one side and the inputs on the other side.
An efficient new design of nano-scale comparator circuits using quantum-dot technology
Mehdi Darbandi, Saeid Seyedi, Hamza Mohammed Ridha Al-Khafaji
Heliyon, 2024
Traditional semiconductor-based technology has recently faced many issues, such as physical scalability constraints and short-channel properties. Much research on nano-scale designs has resulted in these flaws. Quantum-dot Cellular Automata ( QCA ) is a promising nanotechnology solution for solving CMOS -related issues. The 4-dot squared cell is identified as the main feature of this technology. Also, a comparator is an essential electronic device that compares 2 voltages or currents. It is frequently employed to confirm whether an input has achieved a predefined value or not. So, the design of the QCA-based comparator is one of the interesting lines in recent studies. However, cell and area consumption limits the circuit design in the most relevant research. As a result, two efficient comparator circuits based on the inherent rules of quantum dots have been presented in this work. The proposed 1-bit design employs 35 quantum cells in a 0. 04 μm 2 compact layout space. Also, the proposed 2-bit design uses 173 cells in a 0. 19 μm2 compact layout area. These circuits, which are built across three layers of 90-degree cells, remove the need for coplanar crossovers, ensuring accessible inputs and outputs. The presented 1-bit comparator circuit uses 3 majority gates with three inputs. The first output signal in 1-bit comparator is generated after 0.75 clock phases and in 2-bit design after 1.25 clock phases . QCADesigner-E evaluated the suggested circuits' practical accuracy, cost, and power. The results showed that the proposed designs are extremely efficient in cell and area consumption compared to the state-of-the-art designs.
Efficient design and implementation of approximate FA, FS, and FA/S circuits for nanocomputing in QCA
Saeid Seyedi, Hatam Abdoli
Plos One, 2024
Recently, there has been a lot of research in Quantum Cellular Automata (QCA) technology because it promises low power consumption, low complexity, low latency, and compact space. Simultaneously, approximate arithmetic, a new paradigm in computing, streamlines the computational process and emerges as a low-power, high-performance design approach for arithmetic circuits. Furthermore, the XOR gate has been widely used in digital design and is a basic building block that can be used in many upcoming technologies. The full adder (FA) circuit is a key component of QCA technology and is utilized in arithmetic logic operations including subtraction, multiplication, and division. A great deal of research has been done on the design of approximate FA, full subtractor (FS), full adder/subtractor (FA/S), and 4-bit ripple carry adder (RCA) based on XOR logic, establishing them as essential components in the creation of QCA-based arithmetic circuits. This study presents three new and effective QCA-based circuits, based on XOR logic: an approximate FA, an approximate FS, an approximate FA/S, and an approximate 4-bit ripple carry adder (RCA). Interestingly, some designs have inputs on one side and outputs on the other, making it easier to reach the components without being encircled by other cells and leading to a more effective circuit design. In particular, a delay of 0.5 clock phases, an area of 0.01 μm2, and implementation utilizing just 11 cells was accomplished in the approximate FA and subtractor designs. In a similar vein, the estimated FA/S designs showed 0.5 clock phase delay, 0.01 μm2 area, and 12 cells used for implementation. An approximate 4-bit RCA is proposed using 64 QCA cells. The effectiveness of these designs is evaluated through functional verification with the QCADesigner program. According to simulation results, these proposed solutions not only function well but significantly outperform previous ideas in terms of speed and space. The proposed FA, FS, and RCA designs surpassed the previous best designs by 21%, 21%, and 43%, respectively, in terms of cell count.
Optimized Design of Lower Complexity Reversible Toffoli Gate in QCA Technology
Saeid Seyedi, Hatam Abdoli
2024 6th Iranian International Conference on Microelectronics Iicm 2024, 2024
An efficient design of a Crossbar Switch for Banyan Network and Nano Communication based on QCA technology
Saeid Seyedi, Hatam Abdoli
11th International Symposium on Telecommunication Communication in the Age of Artificial Intelligence Ist 2024, 2024
A Nano-based High-Speed QCA circuit for Information Security with Image Masking
Saeid Seyedi, Hatam Abdoli
15th International Conference on Information and Knowledge Technology Ikt 2024, 2024
Predicting Concentration of Particulate Matter (PM2.5) in Hamedan using Machine Learning Algorithms
Anita Karim Ghassabpour, Hatam Abdoli, Muharram Mansoorizadeh, Saeid Seyedi
15th International Conference on Information and Knowledge Technology Ikt 2024, 2024
Quantum-based serial-parallel multiplier circuit using an efficient nano-scale serial adder
Hongyu Wu, Shuai Jiang, Nima Jafari Navimipour, Saeid Seyedi
Informacije MIDEM, 2024
A Space-Efficient Universal and Multi-Operative Reversible Gate Design Based on Quantum-Dots
Saeid Seyedi, Nima Jafari Navimipour
Journal of Circuits Systems and Computers, 2023
A new design for 4-bit RCA using quantum cellular automata technology
Saeid Seyedi, Behrouz Pourghebleh
Optical and Quantum Electronics, 2023
A Fault-Tolerance Nanoscale Design for Binary-to-Gray Converter based on QCA
Saeid Seyedi, Nima Jafari Navimipour
IETE Journal of Research, 2023
A fault-tolerant image processor for executing the morphology operations based on a nanoscale technology
Saeid Seyedi, Nima Jafari Navimipour
Multimedia Tools and Applications, 2023
A New Nano-Scale and Energy-Optimized Reversible Digital Circuit Based on Quantum Technology
Saeid Seyedi, Nima Jafari Navimipour, Akira Otsuki
Electronics Switzerland, 2022
Designing a multi-layer full-adder using a new three-input majority gate based on quantum computing
Saeid Seyedi, Nima Jafari Navimipour
Concurrency and Computation Practice and Experience, 2022
An efficient structure for designing a nano-scale fault-tolerant 2:1 multiplexer based on quantum-dot cellular automata
Saeid Seyedi, Nima Jafari Navimipour
Optik, 2022
A new coplanar design of a 4-bit ripple carry adder based on quantum-dot cellular automata technology
Saeid Seyedi, Behrouz Pourghebleh, Nima Jafari Navimipour
Iet Circuits Devices and Systems, 2022
Designing a three-level full-adder based on nano-scale quantum dot cellular automata
Saeid Seyedi, Nima Jafari Navimipour
Photonic Network Communications, 2021
Design and analysis of fault‐tolerant 1:2 demultiplexer using quantum‐dot cellular automata nano‐technology
Saeid Seyedi, Nima Jafari Navimipour, Akira Otsuki
Electronics Switzerland, 2021
A new cost-efficient design of a reversible gate based on a nano-scale quantum-dot cellular automata technology
Saeid Seyedi, Akira Otsuki, Nima Jafari Navimipour
Electronics Switzerland, 2021
Designing a New 4:2 Compressor Using an Efficient Multi-Layer Full-Adder Based on Nanoscale Quantum-Dot Cellular Automata
Saeid Seyedi, Nima Jafari Navimipour
International Journal of Theoretical Physics, 2021
New Design of a 4-Bit Ripple Carry Adder on a Nano-Scale Quantum-Dot Cellular Automata
Saeid Seyedi, Alireza Ghanbari, Nima Jafari Navimipour
Moscow University Physics Bulletin, 2019
Designing an efficient fault tolerance D-latch based on quantum-dot cellular automata nanotechnology
Saeid Seyedi, Mehdi Darbandi, Nima Jafari Navimipour
Optik, 2019
An Optimized Three-Level Design of Decoder Based on Nanoscale Quantum-Dot Cellular Automata
Saeid Seyedi, Nima Jafari Navimipour
International Journal of Theoretical Physics, 2018
Design and evaluation of a new structure for fault-tolerance full-adder based on quantum-dot cellular automata
Saeid Seyedi, Nima Jafari Navimipour
Nano Communication Networks, 2018
An optimized design of full adder based on nanoscale quantum-dot cellular automata
Saeid Seyedi, Nima Jafari Navimipour
Optik, 2018

RECENT SCHOLAR PUBLICATIONS

Quantum-dot cellular automata-based approximate CSA and RBS with ultra-low cells
S Seyedi, H Abdoli
Journal of Computational Electronics 25 (3), 97 , 2026
2026
A compact and efficient QCA-based nano-scale circuit for morphological operations in image processing
S Seyedi, H Abdoli, M Sefidabian
Cluster Computing 29 (3), 184 , 2026
2026
A scalable architecture for quantum information processors: qubit partitioning, placement, and scheduling for minimized circuit latency
Z Alimohammadi, N Mohammadzadeh, S Seyedi, H Abdoli
EPJ Quantum Technology , 2026
2026
A Novel Nano-Scale Shift Register Architecture with Rest Function Based on Quantum Dots
L Fu, S Seyedi
IETE Journal of Research, 1-6 , 2025
2025
Citations: 1
Design and assessment of even parity generator and checker circuits for nanoscale communication networks using quantum dots
S Seyedi, H Abdoli
Scientific Reports 15 (1), 26022 , 2025
2025
Citations: 1
A new design of an efficient configurable circuit based on quantum-dot technology for digital image processing
L Tang, T Kong, S Seyedi
Analog Integrated Circuits and Signal Processing 122 (3), 36 , 2025
2025
Citations: 14
Approximate Full-Adder, Full-Subtractor, and Full-Adder/Subtractor Circuits Based on QCA
S Seyedi, H Abdoli
2025 29th International Computer Conference, Computer Society of Iran (CSICC … , 2025
2025
Citations: 3
A fault tolerant CSA in QCA technology for IoT devices
S Seyedi, H Abdoli
Scientific Reports 15 (1), 3396 , 2025
2025
Citations: 23
An approximate FA, FS, and FA/S circuits based on QCA technology
S Seyedi, H Abdoli
29th International Computer Conference (Computer Society of Iran, Sharif … , 2025
2025
Predicting Concentration of Particulate Matter (PM2. 5) in Hamedan Using Machine Learning Algorithms
AK Ghassabpour, H Abdoli, M Mansoorizadeh, S Seyedi
2024 15th International Conference on Information and Knowledge Technology … , 2024
2024
Citations: 1
An efficient new design of nano-scale comparator circuits using quantum-dot technology
M Darbandi, S Seyedi, HMR Al-Khafaji
Heliyon 10 (18) , 2024
2024
Citations: 20
Efficient design and implementation of approximate FA, FS, and FA/S circuits for nanocomputing in QCA
S Seyedi, H Abdoli
PloS one 19 (9), e0310050 , 2024
2024
Citations: 26
Quantum-based serial-parallel multiplier circuit using an efficient nano-scale serial adder
H Wu, S Jiang, S Seyedi, NJ Navimipour
Informacije MIDEM 54 (2) , 2024
2024
Citations: 8
A Nano-based High-Speed QCA circuit for Information Security with Image Masking
S Seyedi, H Abdoli
15th International Conference on Information and Knowledge Technology , 2024
2024
Citations: 3
Optimized design of Lower Complexity Reversible Toffoli Gate in QCA Technology
S Seyedi, H Abdoli
6th Iranian International Conference on Microelectronics , 2024
2024
Citations: 1
An efficient design of a Crossbar Switch for Banyan Network and Nano Communication based on QCA technology
S Seyedi, H Abdoli
11th International Symposium on Telecommunication (IST'2024) , 2024
2024
An Approximate XOR-based Full-Adder in Quantum Cellular Automata
S Seyedi, H Abdoli
Khwarizmi International Conference on Science and Technology 1, https … , 2024
2024
A space-efficient universal and multi-operative reversible gate design based on quantum-dots
S Seyedi, NJ Navimipour
Journal of Circuits, Systems and Computers 32 (10), 2350166 , 2023
2023
Citations: 12
A fault-tolerance nanoscale design for binary-to-gray converter based on QCA
S Seyedi, NJ Navimipour
IETE Journal of Research 69 (5), 2991-2998 , 2023
2023
Citations: 49
A fault-tolerant image processor for executing the morphology operations based on a nanoscale technology
S Seyedi, NJ Navimipour
Multimedia Tools and Applications 82 (2), 2489-2502 , 2023
2023
Citations: 15

MOST CITED SCHOLAR PUBLICATIONS

An optimized design of full adder based on nanoscale quantum-dot cellular automata
S Seyedi, NJ Navimipour
Optik 158, 243-256 , 2018
2018
Citations: 114
Design and evaluation of a new structure for fault-tolerance full-adder based on quantum-dot cellular automata
S Seyedi, NJ Navimipour
Nano communication networks 16, 1-9 , 2018
2018
Citations: 79
Designing an efficient fault tolerance D-latch based on quantum-dot cellular automata nanotechnology
S Seyedi, M Darbandi, NJ Navimipour
Optik 185, 827-837 , 2019
2019
Citations: 64
A fault-tolerance nanoscale design for binary-to-gray converter based on QCA
S Seyedi, NJ Navimipour
IETE Journal of Research 69 (5), 2991-2998 , 2023
2023
Citations: 49
An optimized three-level design of decoder based on nanoscale quantum-dot cellular automata
S Seyedi, NJ Navimipour
International Journal of Theoretical Physics 57 (7), 2022-2033 , 2018
2018
Citations: 41
An efficient structure for designing a nano-scale fault-tolerant 2: 1 multiplexer based on quantum-dot cellular automata
S Seyedi, NJ Navimipour
Optik 251, 168409 , 2022
2022
Citations: 38
A new coplanar design of a 4‐bit ripple carry adder based on quantum‐dot cellular automata technology
S Seyedi, B Pourghebleh, N Jafari Navimipour
IET Circuits, Devices & Systems 16 (1), 64-70 , 2022
2022
Citations: 34
A new cost-efficient design of a reversible gate based on a nano-scale quantum-dot cellular automata technology
S Seyedi, A Otsuki, NJ Navimipour
Electronics 10 (15), 1806 , 2021
2021
Citations: 34
A new design for 4-bit RCA using quantum cellular automata technology
S Seyedi, B Pourghebleh
Optical and Quantum Electronics , 2022
2022
Citations: 31
Designing a three-level full-adder based on nano-scale quantum dot cellular automata
S Seyedi, NJ Navimipour
Photonic Network Communications 42 (3), 184-193 , 2021
2021
Citations: 30
Designing a new 4: 2 compressor using an efficient multi-layer full-adder based on nanoscale quantum-dot cellular automata
S Seyedi, NJ Navimipour
International Journal of Theoretical Physics 60 (7), 2613-2626 , 2021
2021
Citations: 30
Designing a multi‐layer full‐adder using a new three‐input majority gate based on quantum computing
S Seyedi, N Jafari Navimipour
Concurrency and Computation: Practice and Experience, e6653 , 2021
2021
Citations: 30
Efficient design and implementation of approximate FA, FS, and FA/S circuits for nanocomputing in QCA
S Seyedi, H Abdoli
PloS one 19 (9), e0310050 , 2024
2024
Citations: 26
Design and analysis of fault-tolerant 1: 2 demultiplexer using quantum-dot cellular automata nano-technology
S Seyedi, NJ Navimipour, A Otsuki
Electronics 10 (21), 2565 , 2021
2021
Citations: 26
A fault tolerant CSA in QCA technology for IoT devices
S Seyedi, H Abdoli
Scientific Reports 15 (1), 3396 , 2025
2025
Citations: 23
New design of a 4-bit ripple carry adder on a nano-scale quantum-dot cellular automata
S Seyedi, A Ghanbari, NJ Navimipour
Moscow University Physics Bulletin 74 (5), 494-501 , 2019
2019
Citations: 22
An efficient new design of nano-scale comparator circuits using quantum-dot technology
M Darbandi, S Seyedi, HMR Al-Khafaji
Heliyon 10 (18) , 2024
2024
Citations: 20
A fault-tolerant image processor for executing the morphology operations based on a nanoscale technology
S Seyedi, NJ Navimipour
Multimedia Tools and Applications 82 (2), 2489-2502 , 2023
2023
Citations: 15
A new design of an efficient configurable circuit based on quantum-dot technology for digital image processing
L Tang, T Kong, S Seyedi
Analog Integrated Circuits and Signal Processing 122 (3), 36 , 2025
2025
Citations: 14
A new nano-scale and energy-optimized reversible digital circuit based on quantum technology
S Seyedi, N Jafari Navimipour, A Otsuki
Electronics 11 (23), 4038 , 2022
2022
Citations: 14

Saeid Seyedi

RESEARCH INTERESTS

Scopus Publications

RECENT SCHOLAR PUBLICATIONS

MOST CITED SCHOLAR PUBLICATIONS