Electrical and Electronic Engineering, Electrical and Electronic Engineering, Signal Processing, Computer Engineering
51
Scholar Citations
5
Scholar h-index
1
Scholar i10-index
RECENT SCHOLAR PUBLICATIONS
Analytical modeling of cylindrical Silicon-on-Insulator Schottky Barrier MOSFET and impact of insulator pillar radius on analog/RF and linearity parameters for low power … J Kumar, A Saxena, SS Deswal, AN Mahajan, RS Gupta Microelectronics Journal 156, 106505 , 2025 2025 Citations: 1
Implementation of High-K Gate Dielectric in Cylindrical SOI Schottky Barrier MOSFET for Enhanced I ON /I OFF Ratio N Uppal, A Saxena, V Nath, RS Gupta 2024 IEEE International Conference of Electron Devices Society Kolkata … , 2024 2024
RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 30 (6), 673-685 , 2024 2024 Citations: 5
Design of low power analog/RF signal processing circuits using 22 nm silicon-on-insulator Schottky barrier nano-wire MOSFET J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta International Journal of High Speed Electronics and Systems 33 (01), 2450003 , 2024 2024 Citations: 5
Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 29 (10), 1431-1442 , 2023 2023 Citations: 2
Small signal model parameter extraction for cylindrical silicon-on-insulator Schottky barrier MOSFET A Saxena, M Kumar, RK Sharma, RS Gupta Microsystem Technologies 29 (4), 645-654 , 2023 2023 Citations: 5
Design of First Order Active Low Pass Filter using 22nm Gate All Around Silicon-on-Insulator Schottky Barrier MOSFET A Saxena, M Kumar, RK Sharma, RS Gupta 2021 International Conference on Industrial Electronics Research and … , 2021 2021 Citations: 6
Linearity Investigation of Ultra-Low-Power Cylindrical SOI Schottky Barrier MOSFET for Biomedical and 5G/LTE Circuits Application A Saxena, RK Sharma, M Kumar, RS Gupta 2021 Devices for Integrated Circuit (DevIC), 363-367 , 2021 2021 Citations: 4
Cylindrical SOI schottky barrier MOSFET with high linearity and low static power for digital and analog circuits application A Saxena, M Kumar, RK Sharma, RS Gupta International Journal of High Speed Electronics and Systems 30 (01n02), 2140003 , 2021 2021 Citations: 4
SOI Schottky Barrier Nanowire MOSFET with Reduced Ambipolarity and Enhanced Electrostatic Integrity: Saxena, Kumar, Sharma, and Gupta A Saxena, M Kumar, RK Sharma, RS Gupta Journal of Electronic Materials 49 (7), 4450-4456 , 2020 2020 Citations: 14
Alignment of DNA sequence using the features of global and local algorithms along with matrices K Sharma, A Saxena, P Kumar Advanced Materials Research 403, 2012-2015 , 2012 2012 Citations: 2
Algorithm Design for Generation of Fault Dictionary in Analog VLSI Circuits A Saxena, P Kumar, K Sharma, BK Kaushik 2010 International Conference on Advances in Recent Technologies in … , 2010 2010 Citations: 1
Notice of Retraction: A new approach to find the alignment of DNA sequence using matrices K Sharma, A Saxen, N Gupta, P Kumar, R Singla 2010 3rd International Conference on Computer Science and Information … , 2010 2010 Citations: 1
A new approach for testing CMOS circuits for glitches A Saxena, RP Agarwal, BK Kaushik, P Kumar, K Sharma 2010 International Conference On Computer Design and Applications 3, V3-595 … , 2010 2010 Citations: 1
MOST CITED SCHOLAR PUBLICATIONS
SOI Schottky Barrier Nanowire MOSFET with Reduced Ambipolarity and Enhanced Electrostatic Integrity: Saxena, Kumar, Sharma, and Gupta A Saxena, M Kumar, RK Sharma, RS Gupta Journal of Electronic Materials 49 (7), 4450-4456 , 2020 2020 Citations: 14
Design of First Order Active Low Pass Filter using 22nm Gate All Around Silicon-on-Insulator Schottky Barrier MOSFET A Saxena, M Kumar, RK Sharma, RS Gupta 2021 International Conference on Industrial Electronics Research and … , 2021 2021 Citations: 6
RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 30 (6), 673-685 , 2024 2024 Citations: 5
Design of low power analog/RF signal processing circuits using 22 nm silicon-on-insulator Schottky barrier nano-wire MOSFET J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta International Journal of High Speed Electronics and Systems 33 (01), 2450003 , 2024 2024 Citations: 5
Small signal model parameter extraction for cylindrical silicon-on-insulator Schottky barrier MOSFET A Saxena, M Kumar, RK Sharma, RS Gupta Microsystem Technologies 29 (4), 645-654 , 2023 2023 Citations: 5
Linearity Investigation of Ultra-Low-Power Cylindrical SOI Schottky Barrier MOSFET for Biomedical and 5G/LTE Circuits Application A Saxena, RK Sharma, M Kumar, RS Gupta 2021 Devices for Integrated Circuit (DevIC), 363-367 , 2021 2021 Citations: 4
Cylindrical SOI schottky barrier MOSFET with high linearity and low static power for digital and analog circuits application A Saxena, M Kumar, RK Sharma, RS Gupta International Journal of High Speed Electronics and Systems 30 (01n02), 2140003 , 2021 2021 Citations: 4
Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 29 (10), 1431-1442 , 2023 2023 Citations: 2
Alignment of DNA sequence using the features of global and local algorithms along with matrices K Sharma, A Saxena, P Kumar Advanced Materials Research 403, 2012-2015 , 2012 2012 Citations: 2
Analytical modeling of cylindrical Silicon-on-Insulator Schottky Barrier MOSFET and impact of insulator pillar radius on analog/RF and linearity parameters for low power … J Kumar, A Saxena, SS Deswal, AN Mahajan, RS Gupta Microelectronics Journal 156, 106505 , 2025 2025 Citations: 1
Algorithm Design for Generation of Fault Dictionary in Analog VLSI Circuits A Saxena, P Kumar, K Sharma, BK Kaushik 2010 International Conference on Advances in Recent Technologies in … , 2010 2010 Citations: 1
Notice of Retraction: A new approach to find the alignment of DNA sequence using matrices K Sharma, A Saxen, N Gupta, P Kumar, R Singla 2010 3rd International Conference on Computer Science and Information … , 2010 2010 Citations: 1
A new approach for testing CMOS circuits for glitches A Saxena, RP Agarwal, BK Kaushik, P Kumar, K Sharma 2010 International Conference On Computer Design and Applications 3, V3-595 … , 2010 2010 Citations: 1
Implementation of High-K Gate Dielectric in Cylindrical SOI Schottky Barrier MOSFET for Enhanced I ON /I OFF Ratio N Uppal, A Saxena, V Nath, RS Gupta 2024 IEEE International Conference of Electron Devices Society Kolkata … , 2024 2024