Design and development of integrated low power high performance MOSFET structure Debasis Mukherjee Low Power Designs in Nanodevices and Circuits for Emerging Applications, 2023 This chapter presents a novel MOSFET structure that minimizes all kinds of leakage currents, consumes less area, simplifies some process steps, minimizes the cost of fabrication but demonstrates almost similar performance. Reverse bias p-n junction leakage current, including band-to-band tunneling leakage current, is minimized by inserting a SiO2 insulating layer between the source substrate and the drain substrate. The same structure is also capable of reducing subthreshold leakage current. This gate oxide tunneling current can be controlled by replacing the gate oxide with a high-k dielectric material. This replacement also reduces leakage current due to hot carrier injection from bulk to SiO2. High doping of the drain region lessens depletion width, resulting in reduced tunneling current and, in term, gate-induced drain leakage or GIDL. Insulator layer at the source and drain boundaries erases the possibility of channel punch-through leakage current. By converting the horizontal gate region to a vertical shape, the transistor demonstrates less area, fewer process steps, and a lower cost of fabrication without degrading its performance.
Study the Sensing Performance with Catalytic Metals of Passivated InAlN/GaN Schottky Diode Gas Sensor Bhaskar Roy, Md. Aref Billaha, Ritam Dutta, Debasis Mukherjee Proceedings of IEEE VLSI Dcs 2022 3rd IEEE Conference on VLSI Device Circuit and System, 2022 In this proposed work, InAlN/GaN Schottky hetero-structure diode has been inspected using a physics-based analytical modeling approach for highly linear and sensitive gas sensing applications. Here, the hetero-interface and surface attributes are taken into considerations. The device is primarily modeled using 2-DEG’s reliance on the surface charges, which is reliant on the Sc2O3 passivation layer. The electrode of the gas sensor plays a key part in determining the sensitivity and other vital parameters of the sensors. The proposed structure of the Schottky diode with catalytic electrodes such as Pd, Pt, and other metals on GaN-based sensors has been studied. A Silvaco TCAD simulation tool is used to simulate the Schottky diode-based sensor model and we obtained I-V curves in the presence of different gas concentrations. On biasing voltage of 0.95 V, the I-V curves show a response of nearly 75% in the influence of 500 ppm gas concentration. Also, we observed the change in the sensor response with the temperature at different gas concentrations for various Schottky contacts.
A Voltage Producing Smart Wheelchair Development with Heartbeat Monitoring System Tanjir Arafat, MD Anisur Zaman, Mohammad Monirujjaman Khan, Rajesh Dey, Ipseeta Nanda, Debasis Mukherjee 2021 IEEE 12th Annual Ubiquitous Computing Electronics and Mobile Communication Conference Uemcon 2021, 2021 In this paper the development of a voltage producing smart wheelchair is presented. This wheel chair can use the rotational kinetic energy generated from wheel spin to charge a power bank. In this wheelchair a motor-controller is connected with an Arduino. It receives power from source and controls the motors connected with the wheels according to the signals given by Arduino mega. A dynamo is connected with the wheels to convert the rotational kinetic energy generated from wheel spins. This wheelchair will help us to save the kinetic energy generated from wheel spin and use this energy to recharge a power bank. Features like heart beat monitoring system and emergency calling system are also added in this wheel chair.
Development of a Low-Cost CNC Machine Laser Engraver Zain Hossain Khan, Tashinur Rahman, Salman Arabi, Siddhartha Mohammad, Mohammad Monirujjaman Khan, Rajesh Dey, Ipseeta Nanda, Debasis Mukherjee 2021 IEEE 12th Annual Ubiquitous Computing Electronics and Mobile Communication Conference Uemcon 2021, 2021 This The extension in the quick advancement of development by and large extended the utilization and use of CNC machines yet is exorbitant. This undertaking inspects the blueprint perspectives and machinability examination of minimal effort CNC machine cum etcher which is good for 3-pivot simultaneous activity with less intricacy. The lower cost is refined by interfacing standard PC with miniature regulator-based CNC structure in an Arduino-based implanted framework. After the culmination of machining, trial preliminaries to characterize machining boundaries were held. The reason for the Self-Guided CNC project is to develop a useful CNC type machine fit for following lines on an object to control the armature in cutting the piece effectively. The gadget would be fit for working free of off-board PCs for both activity and deciding cutting ways. The objective isn’t just high-exactness cuts yet additionally plan and plot. An increment in the fast development of Technology altogether expanded the use and use of Computer Numerical Control (CNC) frameworks in businesses yet at an extensive cost. The possibility of creation of ease CNC approached to decrease the expense and intricacy of CNC frameworks. This work examines the plan and execution of ease three-dimensional CNC machines utilizing off-the-rack parts. We constructed the mechanical framework which contains three pivot X, Y, and Z where three stepper engines and their drivers were utilized to move it. A microcontroller was utilized to control the stepper engines in the wake of deciphering the streamed g-code got from the USB/Serial port of the Arduino where it offers two different ways of controlling the machine.
Design of cost effective transistor by software simulation for profitable production Debasis Mukherjee, B.V. Ramana Reddy International Journal of Intelligent Enterprise, 2020 Reduction of process cost is the key factor for profitability in any industry. Semiconductor industry is also not an exception of this rule. In this paper, a novel transistor structure has been proposed with reduced process cost and almost same functionality compared to conventional MOSFET transistor. Details fabrication steps of the novel transistor have been proposed. Working of the proposed structure resembles conventional MOSFET, but structure wise there are many differences. Necessity of source extension and drain extension has been uninvolved, resulting less fabrication cost and higher concentration of transistors in same chip area. Another improvement is removal of gate spacer, resulting cutting down of process cost. Both the conventional MOSFET and the proposed one have been simulated by Sentaurus TCAD toolkit for 7 nm technology generation. The performance of the proposed transistor has been found satisfactory compared to the conventional MOSFET as per the guidance given in International Technology Roadmap for Semiconductors or ITRS (2013) version.
Bird strike-induced damage studies on bio-inspired laminated plates with holes A Garg, NK Shukla, MO Belarbi, D Mukherjee, M Pushpavalli, R Raman, ... Aerospace Science and Technology 162, 110200 , 2025 2025 Citations: 18
Influence of uncertainties in a battery pack with air cooling for electric vehicles on temperature difference and volume of battery module A Sharma, NK Shukla, A Garg, MM Alammar, R Raman, D Mukherjee, L Li Journal of Energy Storage 113, 115643 , 2025 2025 Citations: 3
Emergency gateway system for emergency vehicles – Raksha Abhiyaan S Biswas, D Mukherjee, TT Gohain IN Patent App. 202,431,081,658 , 2024 2024
Biosensor design for biomolecule detection by normally-off ALGAN/GAN MOSHEMT D Mukherjee, P Das, S Das African Journal of Biological Sciences 6 (5), 4488-4500 , 2024 2024
Analysis of P-N Junction Length of Drain and Source in MOSFET Transistor Through TCAD Simulation D Mukherjee, PK Sanda, RS Dhar Journal of Electrical Systems 20 (3), 447-456 , 2024 2024
Advancements in nanodevice design for label-free detection of biomolecules D Mukherjee, D Sarkar, SK Dargar African Journal of Biological Sciences 6 (5), 505-521 , 2024 2024
MINIMIZATION OF LEAKAGE CURRENTS AND REDUCTION OF AREA OF MOSFET STRUCTURE FOR CMOS TRANSISTOR CIRCUITS IN THE SEMICONDUCTOR INDUSTRY D Mukherjee IN Patent App. 202,331,053,801 , 2023 2023
Analysis of dark current and detectivity of CdS/ZnSe Based multiple quantum well photodetector for mid-infrared applications B Roy, MA Billaha, R Dutta, D Mukherjee Physica E: Low-dimensional Systems and Nanostructures 147, 115614 , 2023 2023 Citations: 10
A strategic review on MIR photodetectors: recent status and future trends B Roy, M Aref Billaha, R Dutta, D Mukherjee International Conference On Innovative Computing And Communication, 653-664 , 2023 2023 Citations: 3
Design and Investigation of Split Gate Dielectric Modulated JLFET for Detection of Biological Molecule Using TCAD Simulation R Mandal, D Mukherjee Silicon 15 (3), 1171-1179 , 2023 2023 Citations: 7
Design and Performance Assessment of Split Gate Dielectric Modulated Junction less TFET Variation of Hfo2 by the Divided Gate Insulator for High Sensitivity Using Tcad Simulation R Mandal, D Mukherjee Mathematical Statistician and Engineering Applications 71 (4), 9068-9081 , 2022 2022 Citations: 1
Design and Development of Advanced Acetone Gas Sensors Based on ZnO Doped rGO Nanosheets B Roy, MA Billaha, R Dutta, D Mukherjee, M Halder, R Sinha, S Halder, ... IN Patent App. 202,231,047,136 , 2022 2022
Study the Sensing Performance with Catalytic Metals of Passivated InAlN/GaN Schottky Diode Gas Sensor B Roy, MA Billaha, R Dutta, D Mukherjee 2022 IEEE VLSI Device Circuit and System (VLSI DCS), 41-45 , 2022 2022
Development of a Low-Cost CNC Machine Laser Engraver ZH Khan, T Rahman, S Arabi, S Mohammad, MM Khan, R Dey, I Nanda, ... 2021 IEEE 12th Annual Ubiquitous Computing, Electronics & Mobile … , 2021 2021 Citations: 5
A Voltage Producing Smart Wheelchair Development with Heartbeat Monitoring System T Arafat, MDA Zaman, MM Khan, R Dey, I Nanda, D Mukherjee 2021 IEEE 12th Annual Ubiquitous Computing, Electronics & Mobile … , 2021 2021
Design and development of a novel MOSFET structure for reduction of reverse bias pn junction leakage current D Mukherjee, BVR Reddy International Journal of Intelligence and Sustainable Computing 1 (1), 32-43 , 2020 2020 Citations: 22
Design of cost effective transistor by software simulation for profitable production D Mukherjee, BVR Reddy International Journal of Intelligent Enterprise 7 (1-3), 291-305 , 2020 2020 Citations: 1
Algorithm design, software simulation and mathematical modelling of subthreshold leakage current in CMOS circuits D Mukherjee, BVR Reddy International Journal of Computational Complexity and Intelligent Algorithms … , 2019 2019 Citations: 2
U shaped vertical gate bulk MOSFET for area minimization D Mukherjee, BV Ramana Reddy Journal of Information and Optimization Sciences 39 (1), 369-375 , 2018 2018 Citations: 7
A novel method for reduction of leakage current in MOSFET D Mukherjee, BVR Reddy International Journal of Convergence Computing 3 (1), 48-61 , 2018 2018 Citations: 6
MOST CITED SCHOLAR PUBLICATIONS
Static noise margin analysis of SRAM cell for high speed application D Mukherjee, HK Mondal, BVR Reddy International Journal of Computer Science Issues (IJCSI) 7 (5), 175 , 2010 2010 Citations: 98
Leakage Current reduction in 6T single cell SRAM at 90nm technology S Birla, NK Shukla, D Mukherjee, RK Singh 2010 International Conference on Advances in Computer Engineering, 292-294 , 2010 2010 Citations: 30
Design and development of a novel MOSFET structure for reduction of reverse bias pn junction leakage current D Mukherjee, BVR Reddy International Journal of Intelligence and Sustainable Computing 1 (1), 32-43 , 2020 2020 Citations: 22
Bird strike-induced damage studies on bio-inspired laminated plates with holes A Garg, NK Shukla, MO Belarbi, D Mukherjee, M Pushpavalli, R Raman, ... Aerospace Science and Technology 162, 110200 , 2025 2025 Citations: 18
Leakage current minimization in deep-submicron conventional single cell SRAM NK Shukla, D Mukherjee, S Birla, RK Singh 2010 International Conference on Recent Trends in Information … , 2010 2010 Citations: 17
Analysis of dark current and detectivity of CdS/ZnSe Based multiple quantum well photodetector for mid-infrared applications B Roy, MA Billaha, R Dutta, D Mukherjee Physica E: Low-dimensional Systems and Nanostructures 147, 115614 , 2023 2023 Citations: 10
Design and Investigation of Split Gate Dielectric Modulated JLFET for Detection of Biological Molecule Using TCAD Simulation R Mandal, D Mukherjee Silicon 15 (3), 1171-1179 , 2023 2023 Citations: 7
U shaped vertical gate bulk MOSFET for area minimization D Mukherjee, BV Ramana Reddy Journal of Information and Optimization Sciences 39 (1), 369-375 , 2018 2018 Citations: 7
A novel method for reduction of leakage current in MOSFET D Mukherjee, BVR Reddy International Journal of Convergence Computing 3 (1), 48-61 , 2018 2018 Citations: 6
Implementation of ARINC 429 16 channel transmitter controller on FPGA D Mukherjee, N Kumar, K Singh, H Mondal, BVR Reddy International Conference on Advances in Information Technology and Mobile … , 2011 2011 Citations: 6
Development of a Low-Cost CNC Machine Laser Engraver ZH Khan, T Rahman, S Arabi, S Mohammad, MM Khan, R Dey, I Nanda, ... 2021 IEEE 12th Annual Ubiquitous Computing, Electronics & Mobile … , 2021 2021 Citations: 5
Video manifold feature extraction based on ISOMAP S Menaria, D Mukherjee Int. J. Eng. Sci. Invention 4 (4), 64-67 , 2015 2015 Citations: 5
Manifold feature extraction of video based on ISOMAP S Menaria, IG Iyappan, D Mukherjee International Journal of Engineering Science and Technology 7 (4), 169 , 2015 2015 Citations: 5
Analysis and Simulation of a Low Leakage Conventional SRAM Memory Cell at Deep Sub-Micron Level D Mukherjee, S Birla, NK Shukla, RK Singh, A Singhi, H Sharma International Conference on Control, Communication & Computing (ICCC 2010 … , 2010 2010 Citations: 5
Effect of MOSFET p-n Junction Length on Leakage Current D Mukherjee, BVR Reddy Far East Journal of Electronics and Communications, 101-113 , 2016 2016 Citations: 4
Leakage process and minimization-transistor stacking effect, data retention gated ground cache, drowsy cache D Mukherjee, BVR Reddy Advanced Materials Research 403, 4287-4294 , 2012 2012 Citations: 4
Comparison of three techniques for leakage current minimization in CMOS VLSI Circuit in 90 nm technology D Mukherjee, BVR Reddy, G Perveen, N Kumar, A Noor Int J Recent Trends Eng Technol 4, 162-166 , 2010 2010 Citations: 4
Information realization with statistical predictive inferences and coding form D Mukherjee, P Chakrabarti, A Khanna, V Gupta International Journal of Computer Science and Information Security 8 (6 … , 2010 2010 Citations: 4
A simulation based approach to show various factors affecting the GIDL in MATLAB D Mukherjee, PK Tripathi, BVR Reddy Int J Eng Sci Technol 2, 5534-5548 , 2010 2010 Citations: 4
Influence of uncertainties in a battery pack with air cooling for electric vehicles on temperature difference and volume of battery module A Sharma, NK Shukla, A Garg, MM Alammar, R Raman, D Mukherjee, L Li Journal of Energy Storage 113, 115643 , 2025 2025 Citations: 3