Analog VLSI Circuit Design, Analog Design Automation, Field Programmable Analog Array, Linear and Nonlinear Circuits, EDA tool, Operational transconductance Amplifier
Stabilisation of probabilistic Boolean control networks: a self-triggered method using deep reinforcement learning Pritam Khande, Mousumi Bhanja, Amol Yerudkar, Yang Liu International Journal of Systems Science, 2026 In this paper, we present a novel feedback control method for probabilistic Boolean control networks (PBCNs) leveraging the ideas from reinforcement learning (RL). Specifically, we employ a model-free RL technique, namely double deep-Q network (DDQN), to tackle the self-triggering control (STC) problem, resulting in optimal state feedback controllers that effectively stabilise PBCNs at designated equilibrium points. Furthermore, we introduce a novel STC algorithm, referred to as the ‘Smart Self-Triggering Control’ (SSTC) algorithm. SSTC enables the controller to make intelligent decisions, optimising either the number of step counts to reach an equilibrium or minimising the system-controller communications. Our approach is model-free, offering scalability and providing an efficient solution for controlling large-scale PBCNs. To validate our findings, we apply our method to various PBCN models of gene regulatory networks (GRNs).
ExplainableTrip: An XAI-Driven Personalized Travel Recommendation System Using Gradient Boosting and SHAP Harsh Chitaliya, Deep Jain, Satyavrat Tiwari, Gaurav Singh Khati, Darshana Sankhe, Pratik Kanani, Mousumi Bhanja Ingenierie Des Systemes D Information, 2025 Tourism is an essential sector of the world's economies, necessitating to have travel planning solutions that are personalised and efficient.This work therefore presents ExplainableTrip, an advanced travel recommendation system utilizing Explainable Artificial Intelligence (XAI) to provide expedient and interpretable trip suggestions.With different user preferences, travel constraints, and comprehensive point-of-interest data, generates highly accurate itineraries, achieving an overall accuracy of 98.49% and an F1score of 0.97.ExplainableTrip leverages SHAP values (SHapley Additive exPlanations), to explain how factors like travel distance, time constraints, user interests, and Point of Interest (POI) popularity influence final recommendations.This will enable users to understand why a given set of options is being suggested, thus trusting the system.The methodology used in the system is an elaborate study of POI and inputs from the users based on Jaipur, India, alongside advanced algorithms for distance computation, time slots allotment, and route optimization.SHAP analysis forms a core feature, which enables users to receive customized itineraries while understanding the rationale behind them.ExplainableTrip is an enhancement of travel planning with balance between AI-driven efficiency and interpretability, and combines the latest technology with user-centric transparency to meet contemporary travellers' need for personalization and clarity in trip planning.
CNTFET Based Design of Optimized High Frequency VCII and Its Application as Mixed Mode Universal Filter Suitable for VHF Band Smita Khole, Mousumi Bhanja, Mohammad Faseehuddin, Sadia Shireen, Worapong Tangsrirat International Journal of Numerical Modelling Electronic Networks Devices and Fields, 2025 In this research, Carbon Nanotube Field‐effect Transistors (CNTFETs) are employed in the design of a second‐generation Voltage Conveyor (VCII), an analog block. The aim of this research is to study CNTFETs as an alternative to CMOS for designing high‐frequency and low‐voltage circuits. The complete design procedure for VCII and its two variants, namely, modified VCII (M‐VCII) and VCII minus (VCII−) is presented. This work incorporates variations in the design variables of CNTFETs, including pitch, the number of tubes, and the diameter of carbon nanotubes (CNT). The study explores the impact of these variations on the critical performance parameters of the CNTFETs. The optimal values of the design variables for each transistor are calculated through extensive simulation analysis using the Verilog‐A semi‐empirical Stanford Virtual‐Source Carbon Nanotube Field‐Effect Transistor model. The CNTFET‐based VCII and its variants are optimized and validated at the supply voltage of ±0.9 V. The CNTFET‐based VCII exhibits improved voltage and current bandwidths of 1.4 and 1 THz, respectively. The input/output impedance and power dissipation also validate improvement compared to CMOS implementation. To verify the performance of the proposed VCII and its variants, they are used in the design of a mixed‐mode universal filter (MMUF). The proposed filter is designed for a cut‐off frequency of 79 MHz and consumes 7.368 mW of power. The effects of parameter variations and noise on the VCII design are also discussed.
Design and Experimental Validation of the Versatile Voltage Conveyor-Based Novel Mixed-Mode Universal Filter Configurations and Quadrature Oscillator Mohammad Faseehuddin, Sadia Shireen, Orapin Channumsin, Mousumi Bhanja, Worapong Tangsrirat Journal of Electrical and Computer Engineering, 2025 In this research, a truly mixed‐mode multi‐input single‐output (MISO) universal filter is designed using a second‐generation voltage conveyor (VCII) and an operational transconductance amplifier (OTA). The filter is designed with three VCIIs, three OTAs, two resistors and two grounded capacitors. It is capable of producing various responses including low‐pass (LP), high‐pass (HP), band‐pass (BP), band‐reject (BR) and all‐pass (AP). The filter can also function in all four possible modes of operation: voltage mode (VM), current mode (CM), trans‐admittance mode (TAM) and trans‐impedance mode (TIM). The merits of the filter comprise (i) no requirement for matching passive component; (ii) use of grounded capacitors; (iii) low‐output impedance in VM and TIM operations; (iv) high‐output impedance in CM and TAM operations; and (v) the capacity to tune the quality factor (Q) and the natural angular frequency (ωo). A dual‐mode quadrature oscillator is additionally derived from the proposed filter core. The condition for oscillation and the oscillation frequency can be regulated independently. Moreover, a novel VCII‐exclusive mixed‐mode filter topology is developed from the designed filter. A study is performed on the non‐ideal gains and parasitic effects of the circuits. The designed filters and oscillators are validated in the Cadence design suite using a 0.18 μm real CMOS process. The filters are validated at a frequency of 1.59 MHz, and the oscillator is examined at 1.25 MHz at supply voltages of ±0.9 V. The mixed‐mode filter has also been experimentally tested using commercial integrated circuits (ICs), specifically AD844 and LM13700. The theoretical results are found to exhibit a close correlation with the simulated ones.
Android Based App Development for Remote Logging and Control with Smart Home Watering System Abhilasha Dhanraj, Soumil Sharma, Divyanshu Pethe, Mousumi Bhanja International Conference on E Mobility Power Control and Smart Systems Futuristic Technologies for Sustainable Solutions Icemps 2024, 2024 This article proposes a smart and efficient solution to the difficulties in plant watering experienced by people who enjoy growing plants in their homes but lead hectic lives, frequently travel for work, and frequently move homes, because such situations frequently make it difficult for them to continuously take care of their backyard gardens. The proposed methodology suggests an entirely automated solution to this problem, making sure that plants are watered properly even when the owner isn't home. This software supported smart device gives users the opportunity to keep an eye on the water levels in their plants and spot water supply interruptions brought on by either power outages or a lack of water. The system's potential also includes predictive intelligence, where it can analyze plant moisture levels, anticipate human behaviour, and choose the best times to water plants. The difficulties of caring for plants at home in a fast-paced environment are thus addressed by this novel approach, which shows promise.
A Switched Current Mirror based VLSI Architecture of 1-D DCT for Compressed ECG Signal Acquisition Anirban Ganguly, Debanjana Datta Mitra, Mousumi Bhanja, Anirban Chakraborty, Ayan Banerjee 2024 IEEE Calcutta Conference Calcon 2024 Proceedings, 2024 The discrete cosine transform (DCT) has been identified as a potential basis for compressed sensing (CS) due to its spectral compaction property. In real-time biomedical applications, a discrete-time analog architecture of the DCT processor has been proposed as a low-energy alternative to digital realization. Some compression applications in image and video processing have reported analog 2-D DCT architectures in either charge mode or current mode. Here, a switched current mode circuit realized 1-D DCT in a biomedical CS system, outperforming charge mode with a simpler design and no capacitor issues. Using a current mode matrix vector multiplier (MVM), power consumption was reduced to $9.2 \\mu \\mathrm{W}$ with 41dB PSNR accuracy in SPICE simulations (PTM 65nm CMOS). MATLAB-SPICE co-simulation validated performance with ECG signals at compression ratios (CR) of ${0. 7 5}$ and ${0. 8 7 5}$. Keywords-discrete cosine transform, compressed sensing, switched current mirror, matrix vector multiplier, co-simulation
Graph Based Systematic Synthesis Procedure of gm-C Filter Mousumi Bhanja, Anirban Ganguly, Smita Rani Parija 7th International Conference on Electronics Communication and Aerospace Technology Iceca 2023 Proceedings, 2023 Real world signals, being analog by nature requires analog signal processing. But unfortunately analog domain still lacks of good research on analog EDA tool. Therefore, developing systematic synthesis methodology is a major research topic still to be addressed and improved to cope up with the recent technological advancements in VLSI. In this background, a graph has been employed to represent synthesis methodology for linear analog filters in a systematic way. Nodes of bipartite graph represents some basic first order mathematical functions; those are connected through weighted edges (with relation operator). Traversal of the graph with defined traversal rules gives different subgraphs implementing different types/order of filters. The graph has been optimized with some defined set of rules. Optimized graph has been converted into a multifunctional filter structure, which realizes all types of filters by programming the connections among the building blocks. This systematic synthesis approach supports reusability and programmability in hardware, when implemented in gm-C. Filter response is verified through SPICE simulation.
A novel current-mode biquadratic OTA-C filter Mousumi Bhanja, Indranil Maity, Monalisa Singha Roy, Baidyanath Ray 2015 IEEE International Wie Conference on Electrical and Computer Engineering Wiecon Ece 2015, 2016
Stabilisation of probabilistic Boolean control networks: a self-triggered method using deep reinforcement learning P Khande, M Bhanja, A Yerudkar, Y Liu International Journal of Systems Science, 1-10 , 2026 2026 Citations: 1
Enhanced Strength and Microstructure of AA7075 Matrix Composites Reinforced with SiC and TiC Particles GSP Rao, GG Mahesh, N Mohammed, MD Babu, P Kumar, M Bhanja Annales de Chimie. Science des Materiaux 49 (5), 497 , 2025 2025
ExplainableTrip: An XAI-Driven Personalized Travel Recommendation System Using Gradient Boosting and SHAP H Chitaliya, D Jain, S Tiwari, GS Khati, D Sankhe, P Kanani, M Bhanja Ingénierie des Systèmes d'Information 30 (5), 1189 , 2025 2025 Citations: 3
CNTFET Based Design of Optimized High Frequency VCII and Its Application as Mixed Mode Universal Filter Suitable for VHF Band S Khole, M Bhanja, M Faseehuddin, S Shireen, W Tangsrirat International Journal of Numerical Modelling: Electronic Networks, Devices … , 2025 2025 Citations: 1
Design and Experimental Validation of the Versatile Voltage Conveyor‐Based Novel Mixed‐Mode Universal Filter Configurations and Quadrature Oscillator M Faseehuddin, S Shireen, O Channumsin, M Bhanja, W Tangsrirat Journal of Electrical and Computer Engineering 2025 (1), 8832002 , 2025 2025 Citations: 2
A Switched Current Mirror based VLSI Architecture of 1-D DCT for Compressed ECG Signal Acquisition A Ganguly, DD Mitra, M Bhanja, A Chakraborty, A Banerjee 2024 IEEE Calcutta Conference (CALCON), 1-5 , 2024 2024
Android Based App Development for Remote Logging and Control with Smart Home Watering System A Dhanraj, S Sharma, D Pethe, M Bhanja 2024 International Conference on E-mobility, Power Control and Smart Systems … , 2024 2024 Citations: 1
Incorporating innovative teaching-learning for analog circuit design course M Bhanja, M Faseehuddin, A Warke, A Singh 2023 IEEE Pune Section International Conference (PuneCon), 1-5 , 2023 2023 Citations: 5
Graph based systematic synthesis procedure of gm-C filter M Bhanja, A Ganguly, SR Parija 2023 7th International Conference on Electronics, Communication and … , 2023 2023 Citations: 1
Cell-based synthesis of multiple analog filter and oscillator topologies employing graph B Ray, D Datta, M Bhanja, A Banerjee IEEE Transactions on Computer-Aided Design of Integrated Circuits and … , 2022 2022 Citations: 3
A systematic approach for the design of linear filters and oscillators employing tree representation D Datta, M Bhanja, A Banerjee, B Ray Analog Integrated Circuits and Signal Processing 108 (1), 181-203 , 2021 2021 Citations: 3
Series realization of non-linear analog functions using current mode device D Datta, A Chaudhuri, M Bhanja, B Ray, A Banerjee 2019 4th International Conference on Information Systems and Computer … , 2019 2019 Citations: 3
Cell-based coherent design methodology for linear and non-linear analog circuits D Datta, M Bhanja, A Chaudhuri, B Ray, A Banerjee 2019 32nd IEEE International System-on-Chip Conference (SOCC), 455-460 , 2019 2019 Citations: 2
Design of current-mode high frequency linear analog circuit D Datta, M Bhanja, A Prasad, B Ray, A Banerjee 2019 IEEE Region 10 Symposium (TENSYMP), 429-434 , 2019 2019 Citations: 4
Design of OTA-based Field Programmable Analog Array for Linear and Nonlinear VLSI Circuits M Bhanja IIEST Shibpur, , 2019 2019
Synthesis of nonlinear analog functions M Bhanja, B Ray Journal of Circuits, Systems and Computers 27 (03), 1850040 , 2018 2018 Citations: 4
Reconfigurable Analog Filter Design using Current Mode Device M Bhanja, A Ganguly, D Dutta, B Ray, A Banerjee 2017 14th IEEE India Council International Conference (INDICON), 1-6 , 2017 2017 Citations: 1
A graph based synthesis procedure for linear analog function M Bhanja, B Ray 2017 30th IEEE International System-on-Chip Conference (SOCC), 328-333 , 2017 2017 Citations: 7
A hierarchical and programmable OTA-C filter M Bhanja, B Ray 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 513-518 , 2017 2017 Citations: 6
Design of Configurable Biquadratic Filter M Bhanja, B Ray Journal of Circuits, Systems and Computers 26 (03), 1750036 , 2017 2017 Citations: 5
MOST CITED SCHOLAR PUBLICATIONS
OTA-based logarithmic circuit for arbitrary input signal and its application M Bhanja, BN Ray IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 638-649 , 2015 2015 Citations: 25
Synthesis procedure of configurable building block-based linear and nonlinear analog circuits M Bhanja, BN Ray IEEE Transactions on Computer-Aided Design of Integrated Circuits and … , 2017 2017 Citations: 19
A graph based synthesis procedure for linear analog function M Bhanja, B Ray 2017 30th IEEE International System-on-Chip Conference (SOCC), 328-333 , 2017 2017 Citations: 7
A hierarchical and programmable OTA-C filter M Bhanja, B Ray 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 513-518 , 2017 2017 Citations: 6
Incorporating innovative teaching-learning for analog circuit design course M Bhanja, M Faseehuddin, A Warke, A Singh 2023 IEEE Pune Section International Conference (PuneCon), 1-5 , 2023 2023 Citations: 5
Design of Configurable Biquadratic Filter M Bhanja, B Ray Journal of Circuits, Systems and Computers 26 (03), 1750036 , 2017 2017 Citations: 5
Design of multifunction biquad structure using OTA M Bhanja, K Ghosh, B Ray 2012 5th International Conference on Computers and Devices for Communication … , 2012 2012 Citations: 5
Implementation of nth order polynomial and its applications M Bhanja, K Ghosh, B Ray 2012 International Conference on Informatics, Electronics & Vision (ICIEV … , 2012 2012 Citations: 5
Design of current-mode high frequency linear analog circuit D Datta, M Bhanja, A Prasad, B Ray, A Banerjee 2019 IEEE Region 10 Symposium (TENSYMP), 429-434 , 2019 2019 Citations: 4
Synthesis of nonlinear analog functions M Bhanja, B Ray Journal of Circuits, Systems and Computers 27 (03), 1850040 , 2018 2018 Citations: 4
Design methodology of high frequency M-ary ASK, FSK and QAM M Bhanja, SP Tamang, R Das, B Ray Journal of Circuits, Systems and Computers 24 (10), 1550152 , 2015 2015 Citations: 4
ExplainableTrip: An XAI-Driven Personalized Travel Recommendation System Using Gradient Boosting and SHAP H Chitaliya, D Jain, S Tiwari, GS Khati, D Sankhe, P Kanani, M Bhanja Ingénierie des Systèmes d'Information 30 (5), 1189 , 2025 2025 Citations: 3
Cell-based synthesis of multiple analog filter and oscillator topologies employing graph B Ray, D Datta, M Bhanja, A Banerjee IEEE Transactions on Computer-Aided Design of Integrated Circuits and … , 2022 2022 Citations: 3
A systematic approach for the design of linear filters and oscillators employing tree representation D Datta, M Bhanja, A Banerjee, B Ray Analog Integrated Circuits and Signal Processing 108 (1), 181-203 , 2021 2021 Citations: 3
Series realization of non-linear analog functions using current mode device D Datta, A Chaudhuri, M Bhanja, B Ray, A Banerjee 2019 4th International Conference on Information Systems and Computer … , 2019 2019 Citations: 3
A novel current-mode biquadratic OTA-C filter M Bhanja, I Maity, MS Roy, B Ray 2015 IEEE International WIE Conference on Electrical and Computer … , 2015 2015 Citations: 3
A new systematic synthesis procedure of configurable higher order analog filter M Bhanja, S Kundu, B Ray 2015 IEEE International Symposium on Signal Processing and Information … , 2015 2015 Citations: 3
Design of pseudo-logarithmic function using operational transconductance amplifier M Bhanja, R Chakraborty, B Ray 2012 7th International Conference on Electrical and Computer Engineering … , 2012 2012 Citations: 3
Design and Experimental Validation of the Versatile Voltage Conveyor‐Based Novel Mixed‐Mode Universal Filter Configurations and Quadrature Oscillator M Faseehuddin, S Shireen, O Channumsin, M Bhanja, W Tangsrirat Journal of Electrical and Computer Engineering 2025 (1), 8832002 , 2025 2025 Citations: 2
Cell-based coherent design methodology for linear and non-linear analog circuits D Datta, M Bhanja, A Chaudhuri, B Ray, A Banerjee 2019 32nd IEEE International System-on-Chip Conference (SOCC), 455-460 , 2019 2019 Citations: 2