Noise Effects in a Current Driver for a Neurostimulator Kirill A. Mironov, Denis B. Akhmetov, Ivan A. Rumyancev Proceedings 2024 IEEE Ural Siberian Conference on Biomedical Engineering Radioelectronics and Information Technology Usbereit 2024, 2024 This paper presents the problems of realization of current driver. It provides a stable current amplitude required for electrical stimulation. To ensure the safety of the stimulation process, various publications tend to increase the output impedance of the current driver as high as possible. This improves the stability of the output current with load resistance variation. However, achieving excessively high output resistances is pointless as it will not lead to the desired current stabilization due to the presence of noise current. In this case, the circuit solution becomes unscalable and the chip area and power consumption increases. An algorithm for estimating the rational value of the current driver output resistance based on the RMS noise current at the output of the circuit is proposed. The presence of the output impedance limitation relaxes the size requirements of the current driver transistors and the gain of the operational amplifier. The proposed algorithm is verified by simulation in Cadence Design Systems software using 180 nm CMOS technology.
Current Pulse Generator for Deep Brain Stimulation Kirill A. Mironov, Denis B. Akhmetov, Dmitry V. Morozov International Conference on Electrical Engineering and Photonics Eexpolytech, 2024 Realization of a current driver is presented. It provides a stable current amplitude required for electrical stimulation devices. It is possible to increase the output impedance of the current driver as high as possible, that improves the stability of the output current with load resistance variation. However, achieving excessively high output impedances is pointless, as it will not lead to the desired current stabilization due to the presence of a noise current. In this case, the circuit of the current driver becomes unsalable, the chip area grows and power consumption increases. An algorithm for estimating the rational value of the current driver output impedance based on the RMS noise current at the output of the circuit is proposed. The presence of the output impedance limitation relaxes the size requirements of the current driver MOS transistors and its operational amplifier gain. The proposed algorithm is verified by circuit and layout level simulation using 180 nm CMOS technology.
Oscilloscope and Arbitrary Waveform Generator 3D Interfaces for a Virtual Reality Remote Laboratory Mikhail D. Lotov, Dmitrii A. Sergeev, Ivan A. Rumyancev, Denis B. Akhmetov International Conference on Electrical Engineering and Photonics Eexpolytech, 2024 Remote laboratories proved their effectiveness during the COVID-19 pandemic and since then have been a convenient tool to support the educational process. The addition of virtual reality makes remote laboratories as close as possible to work in the real laboratories. This paper presents the results of developing of 3D interfaces of the Rigol DS1054z oscilloscope and Rigol DG822 arbitrary waveform generator in virtual reality for integration into an existing remote laboratory to transform it into a virtual reality remote laboratory.
Fully Integrated Vector Modulator in 130-nm SiGe BiCMOS Technology for 5G Front-End Modules Ivan A. Rumyancev, Denis B. Akhmetov, Nikita V. Ivanov Proceedings of the 2023 International Conference on Electrical Engineering and Photonics Eexpolytech 2023, 2023 This paper presents the simulation results of a vector modulator that can be used in TX/RX front-end modules of the fifth generation communication systems. The vector modulator is designed in 130-nm SiGe technology and demonstrates RMS amplitude error below 0.2 dB and RMS phase error less than 1.2 degree in 24–30 GHz frequency band while provides about 5 dBm input 1-dB compression point with 0 dB maximum gain and 30 mW power consumption. The layout area of the designed fully integrated circuit is less than 0.5 sq. mm.
Multi-User Remote Laboratory Test Bench Based on a Vector Network Analyzer Ivan A. Rumyancev, Margarita O. Aivazova, Denis B. Akhmetov Proceedings of the Seminar on Electrical Engineering Automation and Control Systems Theory and Practical Applications Eeacs 2023, 2023 This paper presents a new part of the remote laboratory focused on radiofrequency measurements. The key element of the developed system is the Rohde & Schwarz ZNLE3 vector network analyzer, which is used for remote measurement of S-parameters of a phase shifter, attenuators and filters. The average remote measurement time is about 320 ms and the maximum measurement time is about 400 ms. Thus, for 30 simultaneous users, the average measurement time for one user will be about 11 seconds which is acceptable for simultaneous online work.
Work-in-Progress: Virtual Reality Trainer for Vector Network Analyzer Calibration Ivan A. Rumyancev, Margarita O. Aivazova, Denis B. Akhmetov Proceedings 2022 IEEE International Conference on Teaching Assessment and Learning for Engineering Tale 2022, 2022 Virtual reality technology improves students’ experience with laboratory equipment in the case of blended and distance education. Vector networks analyzers are widely used to measure parameters of radio frequency integrated circuits and modules. Vector network analyzers must be calibrated before measurements to eliminate systematic errors. This work-in-progress paper presents a virtual reality trainer for one or two port measurement calibration of a vector network analyzer. The developed application was tested with Oculus Quest 2 headset.
2.4-2.5 GHz fractional-n frequency synthesizer with integrated VCO in 0.18 um CMOS for RFID Systems Denis B. Akhmetov, Alexander S. Korotkov, Ivan A. Rumyancev Proceedings of the 2018 IEEE International Conference on Electrical Engineering and Photonics Eexpolytech 2018, 2018 Paper presents simulation and measurement results of 2.4-2.5 GHz fractional-N frequency synthesizer with integrated voltage controlled oscillator, designed in a standard 0.18 um CMOS technology process, for RFID systems. Phase noise of the designed synthesizer is below −117 dBc/Hz at 1 MHz offset. The output power is −2 dBm, while spur level is below − 79 dBc. Chip area, occupied by the designed circuit, is 1.2 sq. mm.
The reference spur reduction technique for frequency synthesizers Denis B. Akhmetov, Alexander S. Korotkov Proceedings of the 2018 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering Elconrus 2018, 2018 Different topologies of charge pumps proposed for reference spur reduction at the output of the phased-locked loops. Usually they are based on differential topology or employ additional circuits such as operational amplifiers. The proposed solution is based on charge injection compensation technique. The modelling shows spur reduction up to 10 dB comparing to traditional approaches. Finally, the 2.4 GHz transmitter was fabricated in a 180nm UMC CMOS process. It achieves in worst case −74.4dBc at the both ends of frequency band and −79.1dBc in the center.
Radio frequency identification system of Internet of Things based on CMOS integrated circuits D. B. Akhmetov, A. S. Korotkov, D. V. Morozov, M. M. Pilipko, I. A. Rumyancev Proceedings of 2017 IEEE East West Design and Test Symposium Ewdts 2017, 2017 RFID-tags are conventionally provided for various things. A RFID system for Internet of Nano Things based on a UMC 180nm CMOS integrated circuit was proposed. The system is intended for identification of tags realized on a surface-acoustic-wave delay lines and designed as a transceiver front-end with operating frequency range of 2.40–2.48 GHz. A polling signal is a stepped frequency chirp, and the read range makes up 3 m.
Functional simulation of frequency synthesizer with Simulink software D. Akhmetov, A. Korotkov Radioelectronics and Communications Systems, 2013 It is represented functional model of the frequency synthesizer with integer-valued and fractional division factor on a basis of self-tuning phase loop for transient and frequency analysis. The model, developed with Simulink software, allows to define estimate the level of parasitic discrete harmonics in the spectrum of output signal and take into account phase noise of reference voltage controlled generator signals delay in phase detector circuit and pumping circuits, conductive loss in the circuit of low-pass filter, inequality of pump and charge currents, non-stationerity of cycle frequency of delta-sigma modulator. There are represented results of time domain and frequency domain simulation.
