Srinu Bevara

@gvpce.ac.in

Assistant Professor
Gayatri Vidya Parishad College of Engineering(Autonomous)

Srinu Bevara


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https://researchid.co/srinubevara

RESEARCH, TEACHING, or OTHER INTERESTS

Computer Engineering, Computer Vision and Pattern Recognition
2

Scopus Publications

39

Scholar Citations

3

Scholar h-index

1

Scholar i10-index

Scopus Publications

  • Ultra low power reversible arithmetic processor based on QCA
    Vasudeva Bevara, Srinu Bevara, Sudhakar Busi, R. V. V. Murali Krishna, PramodKumar Aylapogu
    Optical and Quantum Electronics, 2024
  • VLSI Architecture of Decision Based Adaptive Denoising Filter for removing salt & pepper noise
    Vasudeva Bevara, Bevara Srinu, Pradyut Kumar Sanki
    Ecs Transactions, 2022
    A new Decision Based Adaptive Denoising Filter (DBADF) algorithm & hardware architecture are proposed for restoring the digital image that is highly corrupted with impulse noise. The proposed DBADF detects only the corrupted pixels and that pixel is restored by the noise-free median value or previous value based upon the noise density in the image. The proposed DBADF uses a window initially and adaptively goes up to window based on the noise corruption more than 50% by impulse noise in the current processing window. The proposed architecture was found to exhibit better visual qualitative and quantitative evaluation based on PSNR, IEF, EKI, SSIM, FOM, and error rate. The DBAMF architecture also preserves the original information of digital image with a high density of salt & pepper noise, when compared to many standard conventional algorithms. The proposed architecture has been simulated using the VIRTEX7 FPGA device and the reported maximum post place and route frequency are 149.995MHz and the dynamic power consumption is 179mW.

RECENT SCHOLAR PUBLICATIONS

  • Ultra low power reversible arithmetic processor based on QCA
    RVVMKPKA Vasudeva Bevara, Srinu Bevara, Sudhakar Busi
    Optical and Quantum Electronics 56 (586) , 2024
    2024
    Citations: 7
  • Ultra low power reversible arithmetic processor based on quantum dot cellular automata
    V Bevara, S Bevara, JC Prasad, MK RVV
    Authorea Preprints , 2023
    2023
    Citations: 2
  • VLSI architecture of decision based adaptive denoising filter for removing salt & pepper noise
    V Bevara, B Srinu, P Kumar Sanki
    Electrochemical Society Transactions 107 (1), 18423-18434 , 2022
    2022
    Citations: 6
  • A novel hardware architecture of Decision Based Adaptive Denoising Algorithm for removing salt & pepper noise
    V BEVARA, PK Sanki, S Bevara
    SGS-Engineering & Sciences 1 (01) , 2021
    2021
  • FPGA Based Implementation of Median Filter using Compare and Exchange Unit
    B Srinu, S Bevara, MN Kumar
    i-Manager's Journal on Digital Signal Processing 7 (1), 33 , 2019
    2019
    Citations: 1
  • A QoS Enhancement in Hybrid Wireless Networks using QOD Routing Protocol
    BS Karri Manjula
    International Journal of Science & Engineering Development Research 1 (11 … , 2016
    2016
  • The Security Considerations with Squid Proxy Server for Windows
    BS E Srinivasa Rao
    International Journal of Engineering Research & Technology 2 (12), 710 , 2013
    2013
  • An efficient facial features extraction technique for face recognition system using local binary patterns
    C Nagaraju, B Srinu, ES Rao
    International Journal of Innovative Technology and Exploring Engineering 2 … , 2013
    2013
    Citations: 23

MOST CITED SCHOLAR PUBLICATIONS

  • An efficient facial features extraction technique for face recognition system using local binary patterns
    C Nagaraju, B Srinu, ES Rao
    International Journal of Innovative Technology and Exploring Engineering 2 … , 2013
    2013
    Citations: 23
  • Ultra low power reversible arithmetic processor based on QCA
    RVVMKPKA Vasudeva Bevara, Srinu Bevara, Sudhakar Busi
    Optical and Quantum Electronics 56 (586) , 2024
    2024
    Citations: 7
  • VLSI architecture of decision based adaptive denoising filter for removing salt & pepper noise
    V Bevara, B Srinu, P Kumar Sanki
    Electrochemical Society Transactions 107 (1), 18423-18434 , 2022
    2022
    Citations: 6
  • Ultra low power reversible arithmetic processor based on quantum dot cellular automata
    V Bevara, S Bevara, JC Prasad, MK RVV
    Authorea Preprints , 2023
    2023
    Citations: 2
  • FPGA Based Implementation of Median Filter using Compare and Exchange Unit
    B Srinu, S Bevara, MN Kumar
    i-Manager's Journal on Digital Signal Processing 7 (1), 33 , 2019
    2019
    Citations: 1
  • A novel hardware architecture of Decision Based Adaptive Denoising Algorithm for removing salt & pepper noise
    V BEVARA, PK Sanki, S Bevara
    SGS-Engineering & Sciences 1 (01) , 2021
    2021
  • A QoS Enhancement in Hybrid Wireless Networks using QOD Routing Protocol
    BS Karri Manjula
    International Journal of Science & Engineering Development Research 1 (11 … , 2016
    2016
  • The Security Considerations with Squid Proxy Server for Windows
    BS E Srinivasa Rao
    International Journal of Engineering Research & Technology 2 (12), 710 , 2013
    2013