Sudhir Nageswara Rao Dakey

@mvsrec.edu.in

Assistant Professor
MVSR Engineering College (A)

Sudhir Nageswara Rao Dakey

EDUCATION

M.Tech. (VLSI System Design), (

RESEARCH, TEACHING, or OTHER INTERESTS

Multidisciplinary, Multidisciplinary, Multidisciplinary, Multidisciplinary
1

Scopus Publications

10

Scholar Citations

2

Scholar h-index

Scopus Publications

RECENT SCHOLAR PUBLICATIONS

  • Wireless Gesture Controlled Robot for Landmine Detection
    SD G Keerthi, G Prathyusha, G Harshitha
    International Journal of Research in Applied Science & Engineering … , 2023
    2023.0
  • FPGA Based 64-Bit True Random Number Generator
    SD B Purushotham, K Manish, V Bhanu Prakash
    International Journal of Creative Research Thoughts 11 (5), g670-g673 , 2023
    2023.0
    Citations: 2
  • An Efficient Guidance System for Ambulance with Dynamic Traffic Lights Control
    SD Nagandla Rohithkumar, Meka Hemanth, Neeli Sathvik
    Journal of Emerging Technologies in Innovation Research 10 (4), g601-g604 , 2023
    2023.0
  • Increased Clock Gating Efficiency for SRAM and Sequential Circuits
    DS Kumar, S Dakey
    Mathematical Statistician and Engineering Applications 71 (3), 1029–1043 … , 2022
    2022.0
  • Design of Area and Power Efficient Line Decoders for SRAM
    KF Tabassum, S Dakey
    International Journal of Emerging Technologies in Engineering Research … , 2017
    2017.0
    Citations: 7
  • Removal of Artifacts Based on Weighted Guided Filtering For Digital Video Quality Enhancement
    N Kavitha, S Dakey, B BhagyaSree
    2017.0
  • Efficient Area and High Speed Advanced Encryption Standard Algorithm
    G Anjali, S Dakey
    International Journal 140 , 2015
    2015.0
  • Design And Analysis Of A Full Adder using Various Reversible Gates
    S Dakey
    International Journal of Modern Trends in Engineering and Research (IJMTER … , 2015
    2015.0
    Citations: 1
  • An Approach for Optimized Timing of Error Correcting Unordered Codes
    N Yasmeen, S Dakey

MOST CITED SCHOLAR PUBLICATIONS

  • Design of Area and Power Efficient Line Decoders for SRAM
    KF Tabassum, S Dakey
    International Journal of Emerging Technologies in Engineering Research … , 2017
    2017.0
    Citations: 7
  • FPGA Based 64-Bit True Random Number Generator
    SD B Purushotham, K Manish, V Bhanu Prakash
    International Journal of Creative Research Thoughts 11 (5), g670-g673 , 2023
    2023.0
    Citations: 2
  • Design And Analysis Of A Full Adder using Various Reversible Gates
    S Dakey
    International Journal of Modern Trends in Engineering and Research (IJMTER … , 2015
    2015.0
    Citations: 1
  • Wireless Gesture Controlled Robot for Landmine Detection
    SD G Keerthi, G Prathyusha, G Harshitha
    International Journal of Research in Applied Science & Engineering … , 2023
    2023.0
  • An Efficient Guidance System for Ambulance with Dynamic Traffic Lights Control
    SD Nagandla Rohithkumar, Meka Hemanth, Neeli Sathvik
    Journal of Emerging Technologies in Innovation Research 10 (4), g601-g604 , 2023
    2023.0
  • Increased Clock Gating Efficiency for SRAM and Sequential Circuits
    DS Kumar, S Dakey
    Mathematical Statistician and Engineering Applications 71 (3), 1029–1043 … , 2022
    2022.0
  • Removal of Artifacts Based on Weighted Guided Filtering For Digital Video Quality Enhancement
    N Kavitha, S Dakey, B BhagyaSree
    2017.0
  • Efficient Area and High Speed Advanced Encryption Standard Algorithm
    G Anjali, S Dakey
    International Journal 140 , 2015
    2015.0
  • An Approach for Optimized Timing of Error Correcting Unordered Codes
    N Yasmeen, S Dakey