Electrical and Electronic Engineering, Signal Processing
2
Scopus Publications
Scopus Publications
P-SCADA - A novel area and energy efficient FPGA architectures for LSTM prediction of heart arrthymias in biot applications Senthil Kumaran Varadharajan, Viswanathan Nallasamy Expert Systems, 2022 Recurrent neural networks (RNN) are extensively used to determine the optimal solutions to the various class recognition problems such as image processing, prediction of biomedical data and speech recognition. With the gradient problems, RNN is slowing losing its shade which is replaced by the Long short term memory (LSTM). However the hardware implementation of the LSTM requires more challenge due to its complexity and high power consumption which makes it unsuitable for implementing in Biological Internet of things networks for prediction of heart diseases. Several algorithms were proposed for an effective implementation of LSTM, but hand‐offs between the performance and utilization still needs improvisation. The paper proposes the novel energy efficient and high performance architecture Pipelined Stochastic Adaptive Distributed Architectures (P‐SCADA) for LSTM networks. In this architecture, hybrid structure has been developed with the help of new distributed arithmetic stochastic computing (DSC) along with the binary circuits to advance the performance of the FPGA such as energy, area and accuracy. The proposed system has been implemented in ARTIX‐7 FPGA with special purpose software has been designed and evaluated with different ECG datasets. For the different series data, area utilization is about 40%–44% and power consumption is about 20%–25% with the prediction of accuracy of 98%. Moreover the proposed architecture has been compared with the other existing architecture such as SPARSE architectures, normal stochastic architectures in which the proposed architecture excels in terms area, power and efficiency.
Low power VLSI circuits design strategies and methodologies: A literature review Senthil Kumaran Varadharajan, Viswanathan Nallasamy 2017 Conference on Emerging Devices and Smart Systems Icedss 2017, 2017 Researchers stare at the design of low power devices as they are ruling the today's electronics industries. In VLSI circuits, power dissipation is a critical design parameter as it plays a vital role in the performance estimation of the battery operated devices particularly used in biomedical applications. The decrease in chip size and increase in chip density and complexity escalate the difficulty in designing higher performance low power consuming system on a chip. Further, overall power management on a chip is becoming a big challenge below 100 nm node because of its increased design complexity. Besides, leakage current also plays a vital role in Power management of low power VLSI devices. In sub-micron technologies, leakage and dynamic power consumption is becoming an essential design parameter as it is dissipating a considerable portion of the total power consumption. To increase the battery life of portable devices, leakage and dynamic power reduction is emerging as a primary goal of the VLSI circuit design. This paper provides an insight about the various methodologies, strategies and power management techniques to be used for the design of low power circuit based systems.
