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Dr.Latha Rajagopalan

Professor & Head · HKBK College of Engineering

https://researchid.co/latha
@hkbk.edu.in
8Scopus Publications
173Google Scholar Citations
7Google Scholar h-index
6Google Scholar i10-index

Research Interests

Low Power VLSI and Multirate DSP

Biography

Dr. R. Latha (Rajagopalan Latha) obtained her Bachelor’s degree in Electronics and Communication Engineering and Master’s degree in Applied Electronics from Bharathiar University , TamilNadu, India, She pursued her Doctorate in the area of Multi rate DSP and Low Power VLSI Design from Anna University-Chennai, TamilNadu, India. She has rich academic & research experience of about 24.9 years. Her specializations include Microelectronics, Microcontroller Architecture Design, Digital Signal Processing and VLSI Design. Her current research interests are in the area of Multi-rate Digital filter design, Wireless Communication and Architecture Optimization using HDL’s. She is a Member of IEEE, IETE, ISTE, IAENG, SEEE, NFED and SSI. She has completed four AICTE sponsored/research projects as a Principal Investigator. She has about 107 technical and research publications and presentations to her credit in International Journals and Conferences.

Education

B.E -Electronics & Communication Engineering M.E- Applied Electronics Ph.D- Anna University

Recent Scopus Publications

  1. Hybrid Threshold Speech Enhancement Scheme Using TEO and Wavelet Coefficients
    2023 2nd International Conference on Electrical Electronics Information and Communication Technologies Iceeict 2023, 2023
  2. FPGA Implementation of Polyphase CIC Based Multistage Filter for Digital Receivers
    8th International Conference on Advanced Computing and Communication Systems Icaccs 2022, 2022
  3. Robust Node Localization with Intrusion Detection for Wireless Sensor Networks
    Intelligent Automation and Soft Computing, 2022
  4. Texture classification using optimized local ternary patterns with nonlinear diffusion as pre-processing
    Multimedia Tools and Applications, 2020
  5. Power and Area Efficient Decimation Filter Architectures of Wireless Receivers
    Proceedings of the National Academy of Sciences India Section A Physical Sciences, 2017

Research Outputs

1. Electronic Lock System with Multi-level Access. Application No:201841046549 2. Electronic Device & Security question & Answer based Multi-locking Method Thereof. Application No:201941011598 3.

Grants / Consultancy

1. AICTE Sponsored PMKVY(TI): 2 (Worth Rs.70.72 Lakhs) 2. R&D Projects: 2 (Worth Rs.2.2 Lakhs) Posted as a trainer at M/s Robert Bosch Engineering and Business Solutions Ltd.,...

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